ADF4007 pdf datasheet High Frequency Divider/PLL Frequency Syn

赵城藏软件站机械电子分类下的ADF4007 pdf datasheet High Frequency Divider/PLL Frequency Syn，文件大小为269KB，适用系统为Vista, Win2003, WinXP, Win2000, NT，以下为介绍或使用方法。

The ADF4007 is a high frequency divider/PLL synthesizer that can be used in a variety of communications applications. It can operate to 7.5 GHz on the RF side and to 120 MHz at the PFD. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, and a divider/prescaler. The divider/ prescaler value can be set by two external control pins to one of four values (8, 16, 32, or 64). The reference divider is permanently set to 2, allowing an external REF_IN frequency of up to 240MHz.

A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and a VCO (voltage controlled oscillator). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.